Dr. Jonathan Graf, CEO of Graf Research, is presenting an industrial talk at the 2024 Field Programmable Logic and Applications (FPL) Conference in Turin, Italy, on September 4th. The conference, known for bringing together leading experts in the field of programmable logic, provides a platform for Dr. Graf to discuss critical advancements in the field.
In his talk, titled "Bitstream Equivalence Checking: Verify the Bits that Fly," Dr. Graf will focus on the importance of robust bitstream verification techniques, particularly as FPGA complexity increases and their use in critical applications expands. Following his presentation, Dr. Graf will be available at the Graf Research exhibit to discuss our Enverite EDA tool suite and the future of bitstream verification.
Graf Research's involvement in FPL 2024 reflects our ongoing commitment to innovation in programmable logic and FPGA technology. For more information about the conference, visit the official FPL website.